Protocol & Application Stress Testing
Today’s modern high-speed interface technologies involve multiple complex interacting layers of communication. PHY layer specifications define electrical waveform shaping and encoding schemes to translate analog signaling levels and changes to digital codes, which correspond to higher communication level commands and data sets. Link layer specifications define the link establishment and management between two devices communicating with each other including packet framing and creation, link buffer and power management, etc. Protocol layer specifications define higher levels of operational transactions and flow control which can be then used by drivers to perform application level storage read/write, video/audio playback and recording, communication, and other functions.
All these layers require IC PHY transceivers, IC controller state machines, IC firmware, operating system drivers, and operating systems to work together – with many possible things that could go wrong. To test these various layers, GRL uses a mix of off-the shelf tools and GRL Test Solutions to customize a complete test solution to meet a particular design’s test requirements.
GRL’s Test Solutions tool kit includes a variety of ways to test and debug issues across the different layers.
GRL not only has Electrical Test Solutions for signal integrity, but also tools to bridge the understanding gap on how Electrical issues manifest into Protocol issues. GRL’s Scope Protocol Decode Solutions allow direct translation of electrical waveforms into protocol information in a format that can be easily analyzed using GRL’s software tools.
GRL can also introduce jitter and ISI impairments into the signal channel to assess the impacts on PHY/Link errors and device enumeration, link stability, and application performance through System Margin Validation Solutions.
GRL also works with dedicated protocol exercisers from LeCroy, analyzer tools from Total Phase, and FPGA-based emulator platforms from IP vendors to create Protocol Compliance, Stress Test, and Analyzer tools. GRL integrates all these tools into custom applications running on different operating systems that can exercise the product being tested in an actual end application environment setting.
Granite River Labs has worked with leading Semiconductor and System companies to develop Custom Protocol and Application Stress Validation programs with very demanding test requirements. GRL’s engineers come from IC validation and Test Equipment backgrounds, and are not only heavy users of protocol test equipment, but will develop their own if no solutions already exist.
Depending on the customer’s test objectives and individual budget, GRL will:
- Develop a custom test plan
- Assign technical experts to project
- Develop custom test methodologies
- Develop custom test tools
- Perform audit testing on IP vendor silicon
- Procure custom test accessories
- Perform compliance & stress testing
- Assist with debugging