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*Promo code is no longer available since conclusion of the event.
Date: Tuesday – Thursday January 28-30, 2020
Time:
Location: Santa Clara Convention Center booth #1053 (expo);
Great America 2 (PCIe seminar)
Expo: GRL will demonstrate the latest Test Solutions with emphasis on Data Center and Automotive applications
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Technical Seminar: GRL Engineering Fellow Darren Gray will present “PCIe Gen 6 and the Road to PAM4”. In 2019, the PCI-SIG® announced that PCI Express® (PCIe®) 6.0 will double the data rate to 64 GT/s using PAM-4 (Pulse Amplitude Modulation with 4 levels) encoding, marking a significant shift from NRZ signaling. With a targeted specification release in 2021, PCIe 6.0 can be expected to present unique challenges for successful design implementation. Darren’s presentation will overview the evolution of PCI Express to the current 5.0 specification, and discuss anticipated signal integrity-related design and test challenges for PCIe 6.0., including power dissipation, signal-to-noise ratio, reflections, and cost/performance.
DesignCon is the nation’s largest event for chip, board and systems design engineers, and brings together thousands of professionals from the high-speed communications and semiconductor communities. GRL experts will be available in booth 1053 to discuss our latest connectivity and charging test solutions and services. We look forward to seeing you!
Please email your media inquiry to mktg@graniteriverlabs.com