GRL’s experts are recognized veterans in the Test & Measurement and Semiconductor Industries and bring years of experience to address challenging testing, debugging, and design needs.
Miki Takahashi, Executive Vice President of Engineering
Miki spent 15 years at O2Micro, Advanced Chip Express and NEC most recently as Analog Design Manager, taking the lead in SERDES IP development and integration into ICs and systems. Miki is an expert in SERDES design, SD Interfaces (UHS-1, UHS-2), CF Interfaces (CFast, XQD), and JEDEC (DDR, UFS). Miki currently Chairs the SD Card Association UHS-TG to drive SI discussion and test specification for UHS-II (SD4.0).
Eugene Sushansky, Director of Global Engineering
Eugene spent over two years at Toshiba America Electronic Components (TAEC) where he was a Senior Hardware Engineering Validation Manager, and over 13 years at PLX Technology (now Broadcom) as Senior Design Manager. Eugene is an expert in silicon and system characterization, as well as SERDES and discrete components validation. He has extensive expertise in receiver and transmitter testing for PCI Express, SAS, SATA, and other high speed data standards.
Steven Lee, Director of QA
With over 25 years experience in QA, Steven manages functional test programs at GRL world-wide, including MFi, HomeKit, Thunderbolt, and USB. Prior to joining GRL, Steven spent 16 years at Apple as USB SQA Manager working on many hardware projects. Prior to Apple, Steven worked for Everex, Borland and Fujitsu PC in similar QA roles.
Sandy Chang, Taiwan Technical Director
Sandy spent 14 years at J-Micron and Agilent/HP most recently as System Design Manager. Sandy is an expert in SATA, USB, PCI Express, HDMI, DisplayPort, DDR, and Ethernet compliance, characterization, and debugging.
Rajaraman Venkatachalam, Software Architect & India Technical Director
Raja spent over 14 years at Tektronix, Intel and Prodigy Technovations leading the development of automated testing solutions for high speed digital interfaces. Raja has deep experience in post-silicon validation methodologies and developing electrical and protocol compliance testing tools, and is an expert in HDMI, MHL, DisplayPort, UniPro, PCI Express, SD, I2C, SPI, UART, and MMC.
Darren W. Gray, Engineering Fellow
Darren spent over 8 years at Tektronix/Synthesys Research where he was a senior application engineer. Darren is an expert in receiver testing and optical transceiver characterization, and his wide-breadth of expertise in high-speed serial data standards includes IEEE 802.3 Ethernet, USB, PCI Express, DisplayPort, and MIPI.
Cyan Chen, Engineering Manager, GRL China
Cyan spent 12 years at Mitac, Flextronix and Jabil as Signal Integrity test engineer, focusing on the validation of enterprise computing, networking, and storage systems. Cyan has extensive experience in DDR, PCI Express, SAS, SATA, USB, and Ethernet, as well as PCB impedance and S-parameter validation.
Kiyoki Sekine, Engineering Manager, GRL Japan
Kiyoki spent 22 years as an engineer for communication engineering area in OKI, Lucent Technologies, HMS Industrial Networks and XXCAL Japan. Kiyoki has expertise in USB (2.0/3.1/Power Delivery), RF/DSP (3GPP, WiFi and ZigBee), and Industrial Ethernet. Kiyoki is the certified test engineer from USB-IF and qualified by the Japanese government as a Professional Engineer (IE).
Shibin Veerendrakumar, Senior Engineering Manager, GRL India
Shibin spent last 11 years at Intel, Nvidia, Freescale and ST Microelectronics, most recently as Staff Engineer. Shibin has deep experience in post-silicon validation and protocol compliance testing and is an expert in System integration, SOC bring up, PCI Express, USB, MIPI, DDR, LPDDR, Laser diode driver, ADC & DAC.
Chin Hun Yaep, Senior Software R&D Engineer
Chin Hun Yaep has over 11 years of experience developing automated test solutions at Agilent, Vitrox, and Intel, most recently as a Senior Software Engineer. Chin Hun has especially deep expertise in PCI Express, USB, DisplayPort, and HDMI electrical test solutions.
Katsuhiro Watanabe, Technical Marketing Manager
Katsuhiro spent over 35 years at Tektronix most recently as a technical marketing manager for high speed digital, RF and Video test and measurement. Katsuhiro has deep experience in high speed serial interface, especially video and display interfaces. He was active in the development of the HDMI electrical Compliance Test Spec.
Hermann Ruckerbauer, Senior Signal Integrity Consultant
Hermann has over twenty years’ experience in high speed measurement and simulation, especially on DRAM-related interfaces. Prior to GRL, Hermann performed design analysis and application testing for several memory generations at Siemens/Infineon, and defined the DDR4 JEDEC signaling standard for Qimonda. Hermann has special expertise in DRAM internal functionally, system application requirements and high speed signaling, as well as other high speed standards including 10G Ethernet, PCIe, SATA, and USB. Author of many patents, in 2005 Hermann was awarded ‘Outstanding Single Patent’ from Infineon for “Temperature Dependent Self Refresh” in DDR memory devices.
Ben Chia, Senior Signal Integrity Consultant
Ben spent 19 years in Rambus and HAL Computer Systems in the field of high speed bus modeling and signal integrity. Ben is an expert in signal integrity measurement/precision probing, DDR2/3 and 10G backplane technologies, and in using Synopsys HSpice, Ansoft HFSS, Agilent ADS, and AtaiTec X2D signal integrity modeling tools to develop PCB, package, connector, signal integrity channel, and IBIS AMI models.